Tanvi Sharma

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I am a Deep Learning Performance Architect at NVIDIA. My work focuses on performance modeling and inference/training optimizations.

Prior to NVIDIA, I was pursuing a PhD under Prof. Kaushik Roy in the School of Electrical and Computer Engineering at Purdue University. My research thesis is on compute-in-memory based accelerators for ML inference, spanning aspects from circuits to systems. I also worked as a Digital Design Engineer at Texas Instruments India for a year before my PhD.

We do not grow absolutely, chronologically. We grow sometimes in one dimension, and not in another, unevenly. We grow partially. We are relative. We are mature in one realm, childish in another. —Anais Nin

Beyond research, I like listening to music, dancing, solving NYT puzzles and finding guinea pigs for my cooking experiments. I also love playing badminton and have won several awards at intra- and inter- college tournaments during my undergrad at Indian Institute of Technology, Roorkee.

news

May, 2026 Served in the Technical Program Committee of ISLPED.
Feb, 2026 Panel Discussion on AI Hardware.
Nov, 2025 Joined NVIDIA as Senior DL Performance Architect.
Oct, 2025 Defended PhD Thesis.
Aug, 2025 Presented MemRaptor at ISLPED in Reykjavík, Iceland.
May, 2025 Presented Dataflow-centric perspective on using CIM for matrix multiplication at ISPASS in Ghent, Belgium.
Mar, 2025 Our work on hardware-software co-design for accelerating transformer inference (HASTILY) got accepted at TCAS-AI.
Jan, 2025 Co-instructing the course on AI Hardware with Prof. Kaushik Roy in Spring 2025.
Jun, 2024 Presented my work on “What, When, Where to Compute-in-Memory” in Design Automation Conference (DAC) as a Young Fellow.
Apr, 2024 Represented Purdue at the CHIPS Summit in Washington DC.
Aug, 2023 Attended MLSys Rising Stars Workshop organized by ML Commons at Google headquarters, Sunnyvale.
Aug, 2023 Grateful to co-host MLSys podcast with Student@systems featuring Prof. Gennady Pekhimenko and Prof. Cheng Tan.
Sep, 2022 Our review paper on Compute-in-Memory Technologies and Architectures for Deep Learning Workloads is available to read from TVLSI.
Aug, 2022 Filed patent with HPL on near memory accelerator to handle concurrent inserts-lookups during hashing.
May, 2022 Research internship with Heterogenous Platforms Lab (HPL), Intel at Hillsboro, Oregon.
Jul, 2021 Published my first work on sparsity-aware SOT-MTJ based crossbars device-circuit co-design at ISLPED.
Jun, 2021 Won Qualcomm Innovation Fellowship, North America with Mustafa Ali.
May, 2021 Industry internship with Memory Subsystem team at Nvidia.
Dec, 2020 Proposal for QIF selected for final round.
Mar, 2020 End of face-to-face classes. Covid era started.
Aug, 2019 Started Graduate Student Life at Purdue.